To increase the capacity of storage in flash memory, multiple bits are stored in a single memory cell. While this increases the capacity, it also typically decreases the longevity of the device: the number of times it can be written; the number of times it can be read per write; and the ability of the data to be error free when the device is unpowered or operating at high temperature, etc.
The majority of the non-volatile memory market is driven in this direction by consumer products where capacity is key and the number of accesses is relatively low, as in a digital music player or a digital camera. Whereas this market segment drives production, there is a reasonable probability that the volumes will be highest and this may translate to lowest cost of parts. Said differently, a multi-level cell (“MLC”) solid-state storage, such as flash memory, operating at half capacity may be less expensive on a cost per bit stored than single-level cell (“SLC”) solid-state storage. While these price ratios are likely to vary over time, this allows a benefit from the disparity when the cost of the MLC is less than half of the SLC on a per bit basis.
In the solid-state storage (“SSS”) space, the ability to use the lowest cost parts while achieving high performance (number and frequency of accesses) is advantageous.